This paper describes the Systems Engineering process utilized to design and document a high speed, mixed signal, Application Specific Integrated Circuit (ASIC), using CORE™ as a requirements traceability and design tool. The paper describes the problem, the design process used and the ways that CORE™ facilitated the process.
Members-Only Content
This content is restricted to members only.
You must be logged in with an active membership to access this page.
Please click the link below to log in. If you do not have an account or your membership is inactive, you may need to register or renew it.