New Chapter Members
The following individuals joined the Midwest Gateway Chapter in 2021:
Jan 5 - Ha Phuong Le
Jan 21 - Bertrand Hughes
Mar 26 - Brendan Devine
Aug 10 - Lucas Mobberley
Aug 17 - Geoffrey Buck
Aug 18 - Ross Schwake
Aug 20 - Lori Kao
Sep 24 - Caleb Blissett
Central Virginia Chapter Dinner and Presentation - June 23, 2021
System engineers use qualitative and quantitative measurements in their work. The use of quantitative measurements is growing; however, the mathematical rigor behind these measurements is rarely done or presented in the literature. Without the mathematical rigor misleading results can occur. System readiness level (SRL) has been introduced as a quantitative measurement to aid in the system engineers and program managers decision-making. The SRL was first developed by Sauser et al [2006] and is continuing to be developed and refined, by Sauser and others. The SRL is defined as a function of technology readiness level (TRL) and integration readiness level (IRL), both of which are ordinal ranking numbers. This presentation will discuss five mathematical properties that if adhered to would increase the mathematic rigor behind the SRL.